Interaction of Hardware Transactional Memory and Microprocessor Microarchitecture
Microprocessors have experienced a significant stall in single-thread performance since about 2004. Instead of significant annual performance improvements for a single core, it is easier to increase performance by providing multiple, independent cores that the application programmer has to coordina...
|Authors and Corporations:||,|
|Title:||Interaction of Hardware Transactional Memory and Microprocessor Microarchitecture|
|Type of Resource:||Electronic Thesis|
Dresden Technische Universität Dresden 2019